Digital logic gates are the building blocks of the digital circuit. Each basic logic gate implements a unique Boolean function and a complex Boolean expression is implemented using the network of basic gates. The three basic logic gates are:
- AND Gate.
- OR Gate.
- NOT Gate.
AND Gate implements the Boolean AND function, OR gate implements the Boolean OR function and likewise NOT Gate (also called Inverter) implements the Boolean NOT function. The Boolean expressions of each basic gate along with their schematics symbol are shown in the following figure.
Introduction to NAND Gate
The input and output variables of the Boolean function can assume any one of two possible values called ‘0’ or ‘1’. In terms of positive logic ‘0’ is considered to be low and ‘1’ is considered to be HIGH, whereas in terms of the negative logic ‘0’ is considered to be HIGH and ‘1’ is considered to be LOW. Any Boolean expression can be implemented using these three basic logic Gates.
These basic digital logic gates that is AND, OR and NOT gates can be combined together in particular topologies to realize other important gates. The most common examples are NAND and NOR Gate. NAND Gate is formed by the combination of AND and NOT Gate in series that is by connecting the output of the AND at the input of the NOT Gate similarly NOR Gate is formed by the combination of OR and NOT Gate. Other important Gates formed by the combination of basic logic gates are XOR (Exclusive OR) and XNOR (Exclusive NOR) Gates. Here the discussion is oriented to the NAND Gate only.
As pointed out in previous paragraph that NAND Gate is the combination of AND and NOT Gate with input of NOT Gate connected at the output of the AND Gate. Thus corresponding to each combination of the inputs NAND Gate will have an output that is the complement of the output of the AND Gate. The schematic symbol along with the basic circuit of the NAND Gate is as shown in the following image:
As shown in the image above NAND Gate process the inputs A and B in such a way that first AND Gate manipulates the input variables A and B to generate A.B and then NOT gate acts on A.B to generate complement of the A.B. The Bubble symbol at the AND gate represents the negation of the output of the AND Gate.
NAND Gate Truth Table:
The relation between the state of the output variable and that of the input variables is represented in the form of the table. This table is called the Truth Table. The Truth Table of the NAND Gate along with its schematics symbol is shown below:
The output of the NAND Gate is LOW if and only if both of its inputs are HIGH otherwise its output is HIGH, note that the output of the NAND Gate is exact complement of the AND Gate in which output will be HIGH if only if inputs are HIGH otherwise the output is LOW for all other combinations of the input variables.
Universality of NAND Gate:
NAND Gate has a very useful property which makes it unique and important among all other Gates. The Boolean expression of any complexity can be implemented using NAND Gate only that NAND Gate alone can be employed to realize all possible Boolean expressions without the need of any other Gate. This property of NAND Gate is called Functional Completeness, due to this property the entire microprocessor can be designed using NAND Gate only! NAND Gate shares this property with NOR Gate and both of the Gates are called Universal Gates.
NAND Gate Circuit:
Now let us understand the circuit that implements the NAND Gate. NAND Gate can be implemented in a variety of ways depending upon the electronic components used to design the circuit. For example diodes, transistors, resistors and combination of these components can implement the NAND Gate. The most popular techniques for designing the NAND gates are TTL (Transistor-Transistor Logic) and CMOS (Complementary Metal Oxide Semiconductor Transistor) logics. An example of the basic circuit implementing the NAND Gate functionality is shown in the figure below:
The inputs A and B of the NAND Gate are connected at the base of the transistors T1 and T2 respectively and the output is taken from the collector. The transistor here acts as the switch so when the signal is applied at the base of the transistor the transistor starts conducting and shorts the output to the ground similarly when no voltage is applied at the input the output is connected to the Vcc as shown. When signal is applied at input A only the transistor T1 turns ON and transistor T2 remains off thus the output terminal is connected to the Vcc and output of the NAND Gate is HIGH, similar is the case when signal is applied at input B only. When no signal is applied at either A and B the output terminal is still connected to the Vcc and output remains HIGH. But when signal is applied at both inputs A and B both transistors T1 and T2 turns on and shorts the output terminal to ground thus output will get LOW this is how the circuit implements the NAND Gate functionality.
NAND Gate IC 4011:
NAND gates are available in the IC packages. As mentioned earlier that TTL (Transistor-Transistor Logic) and CMOS (Complementary Metal Oxide Semiconductor) technologies are used to design NAND gate. One of the most popular IC for NAND Gate is 4011 which is a QUAD two inputs NAND Gate IC which means that this IC contains four independent two input NAND Gates. The pinout and connection diagram of the 7404 IC is shown below:
NAND GATE SYMBOL:
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