 Since the advent of the digital technology in electronics a variety of operations that were formerly performed by the analog circuits were continued to be implemented digitally in digital circuits. For instance digital circuits are used for digital signal processing functions such as filtering which were prior to the digital circuits were done using the analog circuits. As the digital systems were also very effective and reliable further applications of digital circuits came into the field. One of the most important operations performed by the digital systems is the Arithmetic operations.

Arithmetic operations performed by the digital circuits include addition, subtraction, multiplication and division. In addition to arithmetic operations other important functions are also performed by the digital systems.

Half Adder is the digital logic circuit that is used to implement the binary addition. Binary addition is exactly similar to the denary addition and also follows the same rule: the only difference is the number system on which each addition operates. In the binary addition as the name suggest binary numbers are added to yield the sum of the binary numbers. Only two digits ‘0’ and ‘1’ are available in the binary number system where the 1 is the largest and 0 is the smallest digit respectively. Just as in the decimal number systems the weight of the digit depends on the position of the binary digits in the binary number systems as well.

####  The simplest digital circuit used to implement the binary addition is the half adder which has two inputs and two outputs. Each input of the half adder represents the binary digit to be added. The two output bits of the half adder are called SUM and CARRY; SUM bit represents the sum of the two digits and as the name suggests the carry bit represents the carry of the addition of two binary digits. The digital logic circuit that implements the operation of the half adder is as shown in the following image. As shown in the figure above that the half adder is composed of two gates AND Gate and XOR gate. The two inputs of the half adder are fed at the inputs of both gates and each output bit is taken from the output of the AND gate and XOR gate. The output SUM bit is taken from the output of the XOR Gate and the CARRY bit is taken from the output of the AND Gate.

#### Truth Table of Half Adder:

The relation between the state of the output and that of the input is represented in the form of the table. This table is called the Truth Table. The Truth Table of the Half Adder along with its schematics symbol is shown below: The table in the above image represents the binary addition of two binary digits A and B and the outputs are C (carry) and S (sum). It can be seen that the when inputs A and B are both 0 the output is also 0 and thus the output represents the addition of 0. Similarly the output S is 1 when one of the inputs are 1 and carry output is 1 and sum is 0 when both of the inputs are 1. Thus in this way the half adder implements the binary addition.

The Boolean equation also known as the Boolean expression of any digital circuit represents its input and output relationship in terms of the basic gates’ functions. The Boolean equation of the Half Adder is as shown in the following image: As shown in the above image that the sum of the half adder is represented in sum of product form and the carry is represented as the AND function. Notice from the Boolean Expression of the Half Adder that the circuit for half adder can implemented in other ways using gates other than XOR gate. As the Boolean Expressions of any operation can be represented in a number of ways thus there multiple circuits can be designed using different Boolean Expressions and one with more desirable features can be selected.

#### Half Adder Using NAND Gate:

As described earlier that the digital circuit for the half adder can be designed in a variety of ways depending upon the Boolean expression used to realize the hardware of the half adder. It is important to note here that the NAND Gate is the Universal Gate which means that any Boolean Expression can be realized in the hardware form using these gates. Thus the circuit configuration used for implementing the Half Adder using the NAND Gates is as shown in the following image. Like the NAND gates the NOR gates are also the universal gates and thus the half adder can also be implemented using the NOR gates.

The circuit for the half adder can be designed using two ICs that are:

74hc86.

74hc08.

The first one is the IC for the XOR gate and the other one is for the AND gate. Thus the half adder can be implemented using the AND gate and the XOR gate. 