The post Pic 16f676 Microcontroller Voltmeter appeared first on projectiot123 Technology Information Website worldwide.

]]>

After reading this post you will be able to understand the basics of the circuit Pic 16f676 Microcontroller Voltmeter and also you will learn about the important c code for pic voltmeter 7 segment So sit back keep reading and enjoy learning.

we are using these components

- common andoe 7segment displsy
- pic microcontroller 16f676
- 14 pin base
- resistor 10k,10k veriable resistors
- 7805 for voltage regulator
- 100uf .01uf capcitor
- led
- diode
- pic kit 2 for programming

here is the code of reading adc in c language and it is compile in pic ccs c compiler

SET_ADC_CHANNEL(3); // for(i=0;i<2;i++) // { // delay_ms(1); mux(); mux();mux();mux(); mux();mux(); result=read_adc(); //} val2=result; // value = (int8) (read_adc() * 500)/1023; //val2 = read_adc (); value = (val2* 5000)/1023;

3 digit 7 segment with pic 16f676 microcontroller. this is a very simple pic microcontroller voltmeter using 7 segment it can measure up to 99.9 voltage

here is the circuit of 7 segment voltmeter

in this code we are using pic ccs c compiler and read analog signal and convert in to digital

here is the full code of pic16f676 voltmeter

#include <16f676.h> #FUSES NOWDT //No Watch Dog Timer #FUSES INTRC //Internal RC Osc, no CLKOUT #FUSES NOMCLR //Master Clear pin used for I/O #FUSES NOBROWNOUT //No brownout reset #FUSES PUT #device ADC=10 #use delay(INT=4Mhz) #define aon output_LOW(PIN_C0); #define aof output_HIGH (PIN_C0); #define bon output_LOW(PIN_C1); #define bof output_HIGH (PIN_C1); #define con output_LOW(PIN_C2); #define cof output_HIGH (PIN_C2); #define don output_LOW(PIN_C3); #define dof output_HIGH (PIN_C3); #define eon output_LOW(PIN_C4); #define eof output_HIGH (PIN_C4); #define fon output_LOW(PIN_C5); #define fof output_HIGH (PIN_C5); #define gon output_LOW(PIN_A2); #define gof output_HIGH (PIN_A2); #define d1_of output_LOW(PIN_A1); #define d1_on output_HIGH (PIN_A1); #define d2_of output_LOW(PIN_A0); #define d2_on output_HIGH (PIN_A0); #define d3_of output_LOW(PIN_A5); #define d3_on output_HIGH (PIN_A5); int32 value=0,val2,ind=0,ind2=0,cnt5=0,d1; void off(); int thu,ten,unit,digit; void zero(){ aon; bon; con; don; eon; fon; gof; } void one(){ aof; bon; con; dof; eof; fof; gof; } void two(){ aon; bon; cof; don; eon; fof; gon; } void three(){ aon; bon; con; don; eof; fof; gon; } void four(){ aof; bon; con; dof; eof; fon; gon; } void five(){ aon; bof; con; don; eof; fon; gon; } void six(){ aon; bof; con; don; eon; fon; gon; } void seven(){ aon; bon; con; dof; eof; fof; gof; } void eight(){ aon; bon; con; don; eon; fon; gon; } void nine(){ aon; bon; con; don; eof; fon; gon; } void comp1(){ if(digit==0)zero(); if(digit==1)one(); if(digit==2)two(); if(digit==3)three(); if(digit==4)four(); if(digit==5)five(); if(digit==6)six(); if(digit==7)seven(); if(digit==8)eight(); if(digit==9)nine(); DELAY_MS(1); } void mux(){ d1_on;digit=thu;comp1();d1_of; d2_on;digit=ten;comp1();d2_of; d3_on;digit=unit;comp1();d3_of; //d3_on;digit=unit;comp1();d3_of; } void mdelay() { mux();mux();//mux();mux(); mux();mux();mux();mux(); mux();mux();mux();mux(); mux();mux();mux();mux(); mux();mux();mux();mux(); mux();mux();mux();mux(); //mux();mux();mux();mux(); //mux();mux();mux();mux(); } void getad(){ int32 result=0;int8 i; SET_ADC_CHANNEL(3); // for(i=0;i<2;i++) // { // delay_ms(1); mux(); mux();mux();mux(); mux();mux(); result=read_adc(); //} val2=result; // value = (int8) (read_adc() * 500)/1023; //val2 = read_adc (); value = (val2* 5000)/1023; thu = (value/1000); mux(); mux();mux();mux(); mux();mux(); ten = (value/100)%10; mux(); mux();mux();mux(); mux();mux(); unit = (value/10)%10; mux(); mux();mux();mux(); mux();mux(); /* putc(thu+48); putc(ten+48); putc(unit+48); unit = value%10; putc(unit+48); putc(10);putc(13); */ } void main () { DELAY_MS(1); /* //SETUP_ADC_PORTS(NO_ANALOGS); // set_tris_a(0); set_tris_c(0x00); setup_comparator(NC_NC_NC_NC); setup_adc_ports(sAN0 | VSS_VDD); setup_adc(ADC_CLOCK_INTERNAL); setup_adc(ADC_CLOCK_INTERNAL ); set_tris_c(0x00); set_tris_a(0xff); set_tris_a(0b00011001); setup_comparator(NC_NC_NC_NC); // not use comparator module setup_adc_ports( sAN3 | VSS_VDD); setup_adc(ADC_CLOCK_DIV_64); set_tris_a(0b00011001); zero(); //DELAY_MS(1000); while(1) { // DELAY_MS(10); //pwmd(); getad(); mdelay(); }}

for more Engineering Projects click below link

The post Pic 16f676 Microcontroller Voltmeter appeared first on projectiot123 Technology Information Website worldwide.

]]>The post Introduction to Multiplexer appeared first on projectiot123 Technology Information Website worldwide.

]]>

Some of the basic digital circuits are still in use in huge digital systems. These digital circuits implements a particular logic determined by their Boolean Expression and their unique design among them multiplexer is an inevitable digital logic circuit.

In digital electronics the Multiplexer also known as the data selector or MUX is the multiple input and single output digital circuit. The purpose of the Multiplexer is to select one of the several input signals and forward it at the output. N number of input signals are simultaneously connected to the Multiplexer and a specific input signal that is determined by the “select input” of the multiplexer is forwarded at the output. A multiplexer can either be analog or digital, an analog multiplexer is designed to select the analog signals at its input and digital multiplexer is designed to select the digital signals at its input and deliver one of them at the output. The schematic symbol and working principle of the Multiplexer is as represented in the following figure:

The above figure represents a 2 to 1 multiplexer that is it has 2 inputs A and B and one output Z and select pin denoted by S determine which input connects to the output. The operation of the multiplexer can be understood with the help of the second figure; when select pin is at logic high (1) input A will be connected to the output and when select pin is at logic low (0) the input B is connected to the output.

Each digital circuit operates on its input in a particular manner to generate the output. The manner in which the digital circuit responds to its input is referred to as the logic of the digital circuit. The logic of the digital circuit is determined by the Boolean Expression which relates the input and output of the digital circuit in the form of the equation. It is important to note here that the same logic can be implemented with different Boolean Expressions. In a similar way the truth table of the digital circuit represents the relationship between the input and output of the digital circuit in the form of the table. The Boolean Expression of the Multiplexer and its truth table is as shown in the following figure:

The above figure represents the truth table and Boolean Expression of 2 to 1 multiplexer; notice from the table that for select input S 0, output Z is equal to the input A and for select input 1 the output is equal input B. Also note that only one select input is required to switch between two input signals. With two select pins up to four input signals can be selected, with three select pin up to eight input signals can be selected, with 4 select pins up to sixteen input signals can be selected and so on.

The schematic symbols of 4 to 1 multiplexer, 8 to 1 multiplexer and 16 to 1 multiplexer are shown in the following figure. The 4 to 1 multiplexer has two select pins as four different combinations are possible with two inputs and each input signal is selected corresponding to a specific combination. Similarly 16 to 1 multiplexer has four select pins as 16 different combinations are possible.

The applications of Multiplexer are diverse but its most common application is there where there is a need of time division multiplexing of a number of signals. Multiplexers are used in situations when data from different sources are to be fed to the single input. Multiplexers along with its counterpart De-multiplexers (DEMUX) is used to cater the issues related to the space constraints. In some situations the board size is quite small and there is a need to connect multiple inputs to the multiple outputs, thus instead routing copper trace for each individual signal all of the input signals are connected to the MUX and the output of the MUX is connected to the input of the DEMUX. Thus the intended input signal can be connected to the respective output without routing different copper traces. In addition to catering the space constraints this technique also helps to manage the cost issues. Multiplexers can also be found in Source Programmable Counters.

The multiplexer ICs are common products and are readily available in the market. 74157 is a popular Quad 2 to 1 multiplexer that this IC has four 2 to 1 multiplexers all integrated on the same chip. The following figure shows the pinout and working diagram of the multiplexer IC.

All of the multiplexers have single select input that is whether input signal at A1, A2, A3, A4 or B1, B2, B3, B4 are forwarded at Y1, Y2, Y3, Y4 respectively is determined by single select pin.

That is all for now I hope this article would be helpful for you. In the previous article I have discussed about the full adder and full subtractor. In the next article I will come up with more interesting engineering topics. Till then stay connected, keep reading and enjoy learning.

The post Introduction to Multiplexer appeared first on projectiot123 Technology Information Website worldwide.

]]>The post Introduction to Half Adder appeared first on projectiot123 Technology Information Website worldwide.

]]>Since the advent of the digital technology in electronics a variety of operations that were formerly performed by the analog circuits were continued to be implemented digitally in digital circuits. For instance digital circuits are used for digital signal processing functions such as filtering which were prior to the digital circuits were done using the analog circuits. As the digital systems were also very effective and reliable further applications of digital circuits came into the field. One of the most important operations performed by the digital systems is the Arithmetic operations.

Arithmetic operations performed by the digital circuits include addition, subtraction, multiplication and division. In addition to arithmetic operations other important functions are also performed by the digital systems.

Half Adder is the digital logic circuit that is used to implement the binary addition. Binary addition is exactly similar to the denary addition and also follows the same rule: the only difference is the number system on which each addition operates. In the binary addition as the name suggest binary numbers are added to yield the sum of the binary numbers. Only two digits ‘0’ and ‘1’ are available in the binary number system where the 1 is the largest and 0 is the smallest digit respectively. Just as in the decimal number systems the weight of the digit depends on the position of the binary digits in the binary number systems as well.

The simplest digital circuit used to implement the binary addition is the half adder which has two inputs and two outputs. Each input of the half adder represents the binary digit to be added. The two output bits of the half adder are called SUM and CARRY; SUM bit represents the sum of the two digits and as the name suggests the carry bit represents the carry of the addition of two binary digits. The digital logic circuit that implements the operation of the half adder is as shown in the following image.

As shown in the figure above that the half adder is composed of two gates AND Gate and XOR gate. The two inputs of the half adder are fed at the inputs of both gates and each output bit is taken from the output of the AND gate and XOR gate. The output SUM bit is taken from the output of the XOR Gate and the CARRY bit is taken from the output of the AND Gate.

The relation between the state of the output and that of the input is represented in the form of the table. This table is called the Truth Table. The Truth Table of the Half Adder along with its schematics symbol is shown below:

The table in the above image represents the binary addition of two binary digits A and B and the outputs are C (carry) and S (sum). It can be seen that the when inputs A and B are both 0 the output is also 0 and thus the output represents the addition of 0. Similarly the output S is 1 when one of the inputs are 1 and carry output is 1 and sum is 0 when both of the inputs are 1. Thus in this way the half adder implements the binary addition.

The Boolean equation also known as the Boolean expression of any digital circuit represents its input and output relationship in terms of the basic gates’ functions. The Boolean equation of the Half Adder is as shown in the following image:

As shown in the above image that the sum of the half adder is represented in sum of product form and the carry is represented as the AND function. Notice from the Boolean Expression of the Half Adder that the circuit for half adder can implemented in other ways using gates other than XOR gate. As the Boolean Expressions of any operation can be represented in a number of ways thus there multiple circuits can be designed using different Boolean Expressions and one with more desirable features can be selected.

As described earlier that the digital circuit for the half adder can be designed in a variety of ways depending upon the Boolean expression used to realize the hardware of the half adder. It is important to note here that the NAND Gate is the Universal Gate which means that any Boolean Expression can be realized in the hardware form using these gates. Thus the circuit configuration used for implementing the Half Adder using the NAND Gates is as shown in the following image.

Like the NAND gates the NOR gates are also the universal gates and thus the half adder can also be implemented using the NOR gates.

The circuit for the half adder can be designed using two ICs that are:

74hc86.

74hc08.

The first one is the IC for the XOR gate and the other one is for the AND gate. Thus the half adder can be implemented using the AND gate and the XOR gate.

One of the most popular applications of the Half Adder is its use to realize the full adder circuit. The full adder circuit which adds three binary inputs can be implemented using the Half adder.

That is all for now I hope this article would be helpful for you. In the next article I will come up with more interesting topics. Till then stay connected, keep reading and enjoy learning.

The post Introduction to Half Adder appeared first on projectiot123 Technology Information Website worldwide.

]]>The post Introduction to Full Adder appeared first on projectiot123 Technology Information Website worldwide.

]]>Digital Systems performs a variety of operations. Among various information processing tasks are the arithmetic operations which includes binary addition, subtraction, multiplication and division. The most common and basic arithmetic operation is addition of two binary digits. The simplest digital circuit which performs the binary addition operation on two binary digits is called Half Adder. The addition of three binary digits is performed by Full Adder.

A Full Adder is the digital Circuit which implements addition operation on three binary digits. Two of the three binary digits are significant digits A and B and one is the carry input (C-In) bit carried from the previous-less significant stage. Thus the Full Adder operates on these three binary digits to generate two binary digits at its output referred to as Sum (SUM) and Carry-Out (C-out). The truth table of the Full Adder is as shown in the following figure:

The output variable Sum (S) and Carry (C-Out) are obtained by the arithmetic sum of inputs A, B and C-In. The binary variables A and B represent the significant inputs of the Full adder whereas the binary variable C-in represents the carry bit carried from the lower position stage. The Sum (S) of the full adder will be 1 if only one of the three inputs are 1 or all are one otherwise the Sum (S) variable will be 0; as the sum of two 1s in the binary number system is represented by two binary digits with 0 on the lower position and 1 carry out to the higher significant position. Thus variable Carry-Out represents that output of the Full Adder which is carried out on the addition of the two or three binary digits. Thus the Carry-Out (C-Out) bit is 1 when any two of the inputs are 1 or all of the inputs of the full adder are 1.

The full adder is generally is used as a component in a cascade of adders where the circuit performs the arithmetic sum of eight, sixteen or thirty two bit binary numbers.

Boolean Expression of the digital combinational circuit represents the input and output relationship of the circuit. Boolean Expression of the digital circuit can be used to assess the number and type of basic gates used to design the circuit. The Boolean Expression also represents the topology in which the digital gates are combined to create the final output. The Boolean Expression of the Full Adder along with its gate level realization is as shown in the following figure:

The Boolean Expression for the full adder circuit represented in the above image is written in Sum of Product form. Note that both output bits S and C are written in Sum of Product form. It is important to note in the above circuit for the full Adder that the inputs A, B and C are applied at the inputs of the AND Gate and the output of the AND Gates are then applied at input of the OR Gate to generate the final output. It can be seen the circuit of the full adder is actually designed using the Boolean Expressions that is product of the inputs is formed by the AND Gate and sum is produced by the OR gate thus yielding the gate level realization of the Sum of Product representation of the Boolean Expression.

A Full Adder can be designed in a number of ways. As the Boolean Expression that is represented in the Sum of Product form can also be expressed as Product of Sum form. Thus the similar circuit can also be designed using the Product of Sum representation of the Boolean Expression. The Circuit that realizes the Boolean Expression written in Product of Sum form is similar in functionality to the circuit that realizes the same Boolean Expression written in Sum of Product form. Thus we can have two different circuits with identical input and output relationship. Similarly the Boolean Expressions can also be exploited and manipulated in a number of ways in order to design the circuit that represents the similar functionality. For example the De Morgan’s theorem can be used in order to derive multiple solutions to the same problem. The NAND and NOR Gates are classified as Universal Gates that these gates can be used implement any possible Boolean Expression. The Full Adder can also be designed using only NAND gate or NOR Gate. Due to this universality of the NAND Gates one does not need any other gate thus eliminating the use of multiple ICs. The Full Adder circuit using the NAND Gates and the Boolean Expression are as shown in the following figure:

Full Adders finds applications in a lot of circuits which are comparatively complex and carry out complex operations. Some of the common applications of the Full Adder are listed as follows:

- Full Adders are used in the ALU (Arithmetic Logic Unit) of the microprocessor.
- Full Adders are used in Ripple Carry Adders where it is employed to add n-bits at a time.
- The Full Adders are also used to calculate the addresses of memory locations inside the processor.
- In some parts of the processor the full adders are also used to calculate the table indices and increment and decrement of the operators.

I hope this article would be helpful for you. In the next article I will come up with more interesting topics of engineering. Till then stay connected, keep reading and enjoy learning.

The post Introduction to Full Adder appeared first on projectiot123 Technology Information Website worldwide.

]]>The post Introduction to logic gates appeared first on projectiot123 Technology Information Website worldwide.

]]>Digital systems have been gaining attention for the last few decades due to their benefits over analog circuits. Digital Circuits are less prone to noise and signal processing in digital domain is better than in analog domain. The digital logic gates are fundamental building blocks of the Digital Circuit. These logic gats can be wired in variety of ways to perform the particular task. The three basic digital logic gates are:

These basic digital logic gates can be connected in peculiar ways to form other important logic gates. Logic gates formed by the peculiar combination AND, OR and NOT are:

Here the basics of all these logic gates are discussed. Before we start discussion it is important to mention that each basic logic gate implements a particular Boolean operation and these basic logic gates can be connected to implement complex Boolean expressions.

AND Gate perform the Logic AND operation. Basic AND Gate has two inputs and a single output. The relationship between the inputs and output of the AND Gate is represented by Boolean AND function. The following image shows the truth table, schematic symbol and Boolean Expression of AND Gate.

The AND Operation is represented by . sign. The Output of the AND Gate is HIGH if and only if both of its inputs are HIGH.

OR Gate performs the Logic OR operation. Basic OR Gate has two inputs and a single output. The relationship between the inputs and output of the OR Gate is represented by Boolean OR function. The following image shows the truth table, schematic symbol and Boolean Expression of OR Gate.

The OR Operation is represented by + sign. The Output of the OR Gate is HIGH if one of the inputs of the OR Gate is HIGH or both of the inputs are HIGH otherwise its output is LOW.

NOT Gate is the simplest logic gate with single input and single output. NOT Gate is also referred to as INVERTER and implements the logic NOT Operation. The truth table, schematic symbol and Boolean expression of the NOT Gate are as shown in the following figure:

The Output of the NOT Gate is the complement of its input which is represented by the bar symbol. The output will be HIGH when the input is LOW and vice versa.

NAND Gate is formed by connecting output of the AND Gate at the input of the NOT Gate. Thus the NAND Gate is the negation of the AND Gate. The truth table, schematic symbol and Boolean Expression of the NAND Gate are as shown in the following figure:

The output of the NAND Gate is LOW if and only if both of its inputs are HIGH otherwise the output is HIGH. Note that the truth table of the NAND Gate is complement of the AND Gate.

NOR Gate is formed by connecting output of the OR Gate at the input of the NOT Gate. Thus the NOR Gate is the negation of the OR Gate. The truth table, schematic symbol and Boolean Expression of the NOR Gate are as shown in the following figure:

The output of the NOR Gate is HIGH if and only if both of its inputs are LOW otherwise the output is LOW. Note that the truth table of the NOR Gate is complement of the OR Gate.

The XOR Gate is formed by connecting the AND, NOT and OR in particular configuration. XOR Gate is the two input and single output logic gate. The truth table, schematic symbol and Boolean expression the XOR Gate is as shown in the following figure:

The Output of the XOR Gate is HIGH when both of its inputs are different otherwise the output is LOW. The XOR Gate is commonly used in Full Adder, Half Adder circuit. The XOR Gate is also used in the comparator circuit.

Like XOR Gate XNOR Gate is also formed by the combination of basic Gates. XNOR Gate is the complement of the XOR Gate. The truth table, schematic symbol and Boolean Expression of the XNOR Gate is as shown in the following figure:

The output of the XNOR Gate is HIGH if and only if both of the inputs are same otherwise the output is LOW. Note here that the truth table of the XNOR Gate is the complement of the XOR Gate.

That is all for now, I hope this article would be helpful for you. In the next article I will come up with more interesting topics. Till then stay connected, keep reading and enjoy learning.

The post Introduction to logic gates appeared first on projectiot123 Technology Information Website worldwide.

]]>The post Introduction to XNOR Gate appeared first on projectiot123 Technology Information Website worldwide.

]]>These basic digital logic gates that is AND, OR and NOT gates can be combined together in particular topologies to realize other important gates. The most common examples are NAND and NOR Gate.

NOR Gate is formed by the combination of OR and NOT Gate in series that is by connecting the output of the OR at the input of the NOT Gate similarly NAND Gate is formed by the combination of AND and NOT Gate. Other important Gates formed by the combination of basic logic gates are XOR (Exclusive OR) and XNOR (Exclusive NOR) Gates. XOR and XNOR are formed by connecting AND, NOT and OR in particular configuration; we will see later that XOR or XNOR Gate can be formed in a variety of ways. Here the discussion in oriented to XNOR Gate only.

XNOR Gate also referred to as Exclusive NOR Gate is a digital logic Gate formed by combining three basic gates that is AND, OR and NOT Gates in a particular configuration. XNOR Gate is a two input single output digital logic gate although it can also be configured for multi inputs. XNOR Gate operates on the inputs in such a way that the network of AND, OR and NOT processes the inputs and generates the output according to the Boolean expression representing the XNOR Gate. The following image shows the schematic symbol and basic network configuration for the XNOR Gate.

The XNOR operation is represented by the sign. Notice in the image that unlike NAND Gate and NOR the exclusive NOR Gate consist of the comparatively complex network to realize the XNOR operation. The Boolean expression representing the XNOR Gate functionality is as shown in the following figure:

Notice that the XNOR functionality can be represented by two Boolean expressions. Other Boolean expression can be derived by using the De Morgan’s Theorem. Each Boolean expression is equivalent to the other and thus it implies that XNOR Gate can be implemented by multiple configurations. Recall from the discussion on NAND Gate and NOR Gate that being universal Gates they can also be used to implement the Boolean expression of XNOR Gate. Thus it concludes that multiple configurations can be employed to realize XNOR Gate functionality. The Boolean Expressions along with their circuit implementation of XNOR Gate are shown in the following image.

The Boolean expression on the left is called the product of sum and other expression derived from the DeMorgan’s Theorem is called as Sum of product.

The relation between the state of the output variable and that of the input variables is represented in the form of the table. This table is called the Truth Table. The Truth Table of the XNOR Gate along with its schematics symbol is shown below:

The output of the XNOR (Exclusive OR) Gate is HIGH if and only if both of the inputs A and B of the XNOR are HIGH otherwise the output will be LOW. Note that the output of the XNOR Gate is HIGH when its inputs are same, for different inputs the output is LOW thus the XNOR Gate can be said to detect the equality of input variables. Also note from the truth table that the output of the XNOR Gate is the exact complement of the XOR Gate.

The Boolean function of XNOR Gate is very important that makes XNOR Gate very useful in digital systems. Although XNOR Gate can be used in a variety of applications one of the most common and simplest applications of XNOR Gate is its use in Full Adder circuit. XNOR Gate in combination to other basic gates can be wired to form Full Adder circuit. The circuit of Full Adder using XNOR Gate is as shown in the following image.

Full Adder performs the binary addition on binary inputs. As shown in the circuit above the full adder has three inputs A, B and CarryIN and two outputs SUM and CarryOUT. The XNOR Gate can also be used to design the comparator due to its unique truth table. The equality comparator using XNOR (Exclusive Gate) is shown in the following figure.

** **

** **

** **

XNOR gates are available in the IC packages. The TTL (Transistor-Transistor Logic) and CMOS (Complementary Metal Oxide Semiconductor) technology is used to designed XNOR gate. One of the most popular IC for XNOR Gate is 74HC266N which is a QUAD two inputs XNOR Gate IC which means that this IC contains four independent two input XNOR Gates. The pinout and connection diagram of the 74HC266N IC is shown below:

That is all for now I hope this article would be useful for you. In the next article I will come up with more interesting topics. Till then stay connected, keep reading and enjoy learning.

The post Introduction to XNOR Gate appeared first on projectiot123 Technology Information Website worldwide.

]]>The post Introduction to XOR Gate appeared first on projectiot123 Technology Information Website worldwide.

]]>Digital logic gates are the building blocks of the digital circuit. Each basic logic gate implements a unique Boolean function and a complex Boolean expression is implemented using the network of basic gates. The three basic logic gates are:

- AND Gate.
- OR Gate.
- NOT Gate.

AND Gate implements the Boolean AND function, OR gate implements the Boolean OR function and likewise NOT Gate (also called Inverter) implements the Boolean NOT function. The Boolean expressions of each basic gate along with their schematics symbol are shown in the following figure.

The input and output variables of the Boolean function can assume any one of two possible values called ‘0’ or ‘1’. In terms of positive logic ‘0’ is considered to be low and ‘1’ is considered to be HIGH, whereas in terms of the negative logic ‘0’ is considered to be HIGH and ‘1’ is considered to be LOW. Any Boolean expression can be implemented using these three basic logic Gates.

These basic digital logic gates that is AND, OR and NOT gates can be combined together in particular topologies to realize other important gates. The most common examples are NAND and NOR Gate. NOR Gate is formed by the combination of OR and NOT Gate in series that is by connecting the output of the OR at the input of the NOT Gate similarly NAND Gate is formed by the combination of AND and NOT Gate. Other important Gates formed by the combination of basic logic gates are XOR (Exclusive OR) and XNOR (Exclusive NOR) Gates. XOR and XNOR are formed by connecting AND, NOT and OR in particular configuration; we will see later that XOR or XNOR Gate can be formed in a variety of ways. Here the discussion in oriented to XOR Gate only.

XOR Gate also referred to as Exclusive OR Gate is a digital logic Gate formed by combining three basic gates that is AND, OR and NOT Gates in a particular configuration. XOR Gate is a two input single output digital logic gate although it can also be configured for multi inputs. XOR Gate operates on the inputs in such a way that the network of AND, OR and NOT processes the inputs and generates the output according to the Boolean expression representing the XOR Gate. The following image shows the schematic symbol and basic network configuration for the XOR Gate.

The XOR operation is represented by the ⊕ sign. Notice in the image that unlike NAND Gate and NOR the exclusive OR consist of the network to realize the XOR operation. The Boolean expression representing the XOR Gate functionality is as shown in the following figure:

Notice that the XOR functionality is represented by two Boolean expressions. Each Boolean expression is equivalent to the other and thus it implies that XOR Gate can be implemented by multiple configurations. Recall from the discussion on NAND Gate and NOR Gate that being universal Gates they can also be used to implement the Boolean expression of XOR Gate. Thus it concludes that multiple configurations can be employed to realize XOR Gate functionality. The Boolean Expressions along with their circuit implementation of XOR Gate are shown in the following image.

The equivalence of the two expressions can be verified using DeMorgan’s LAW. The Expression on the left is called product of sum and that on right is called sum of product.

The relation between the state of the output variable and that of the input variables is represented in the form of the table. This table is called the Truth Table. The Truth Table of the XOR Gate along with its schematics symbol is shown below:

The output of the XOR (Exclusive OR) Gate is HIGH if and only if one of the inputs A and B of the XOR is HIGH otherwise the output will be LOW. Note that the output of the XOR Gate is HIGH when its inputs are different for same inputs the output is LOW thus the XOR Gate can be said to detect the equality of input variables.

The Boolean function of XOR Gate is very important that makes XOR Gate very useful in digital systems. Although XOR Gate can be used in a variety of applications two most common and simplest applications of XOR Gate is its use in Half Adder and Full Adder. XOR Gate in combination to other basic can be wired to form Half Adder and Full Adder circuit. The circuits of Half Adder and Full Adder using XOR Gate are shown in the following image.

Half Adder and Full Adder perform the binary addition on binary inputs. The XOR Gate can also be used to design the comparator due to its unique truth table. In case of Half Adder the XOR solely can represent the sum two inputs binary variables the AND Gate is used to give the Carry bit. S represents the sum and C represents the Carry bit.

The equality comparator using XOR (Exclusive Gate) is shown in the following figure.

XOR gates are available in the IC packages. The TTL (Transistor-Transistor Logic) and CMOS (Complementary Metal Oxide Semiconductor) technology is used to designed XOR gate. One of the most popular IC for XOR Gate is 7486 which is a QUAD two inputs XOR Gate IC which means that this IC contains four independent two input XOR Gates. The pinout and connection diagram of the 7486 IC is shown below:

That is all for now I hope this article would be useful for you. In the next article I will come up with more interesting topics. Till then stay connected, keep reading and enjoy learning.

The post Introduction to XOR Gate appeared first on projectiot123 Technology Information Website worldwide.

]]>The post Introduction to NOR Gate appeared first on projectiot123 Technology Information Website worldwide.

]]>As pointed out in previous paragraph that NOR Gate is the combination of OR and NOT Gate with input of NOT Gate connected at the output of the OR Gate. Thus corresponding to each combination of the inputs of the NOR Gate, it will have an output that is the complement of the output of the OR Gate. The schematic symbol along with the basic circuit of the NOR Gate is as shown in the following image:

As shown in the image above NOR Gate process the inputs A and B in such a way that first OR Gate manipulates the input variables A and B to generate A+B and then NOT gate acts on A+B to generate complement of the A+B. The Bubble symbol at the OR gate represents the negation of the output of the OR Gate.

The relation between the state of the output variable and that of the input variables is represented in the form of the table. This table is called the Truth Table. The Truth Table of the NOR Gate along with its schematics symbol is shown below:

The output of the NOR Gate is HIGH if and only if both of its inputs are LOW otherwise its output is LOW, note that the output of the NOR Gate is exact complement of the output of the OR Gate in which output will be LOW if only if both inputs are LOW otherwise the output is HIGH for all other combinations of the input variables.

NOR Gate has a very useful property which makes it unique and important among all other Gates. The Boolean expression of any complexity can be implemented using NOR Gate only that is NOR Gate alone can be employed to realize all possible Boolean expressions without the need of any other Gate. This property of NOR Gate is called Functional Completeness, due to this property the entire microprocessor can be designed using NOR Gate only! NOR Gate shares this property with NAND Gate and both of the Gates are called Universal Gates.

Now let us understand the circuit that implements the NOR Gate. NOR Gate can be implemented in a variety of ways depending upon the electronic components used to design the circuit. For example diodes, transistors, resistors and combination of these components can implement the NOR Gate. The most popular techniques for designing the NOR gates are TTL (Transistor-Transistor Logic) and CMOS (Complementary Metal Oxide Semiconductor Transistor) logics. An example of the basic circuit implementing the NOR Gate functionality is shown in the figure below:

The inputs A and B of the NOR Gate are connected at the base of the transistors T1 and T2 respectively and the output is taken from the collector. The transistor here acts as the switch so when the signal is applied at the base of the transistor the transistor starts conducting and shorts the output to the ground similarly when no signal is applied at the input the output is connected to the Vcc as shown. When signal is applied neither at input A nor B none of the transistors T1 and T2 turn on and the output terminal remains connected to the Vcc and thus output of the NOR Gate remains HIGH. When signal is applied either at input A or B corresponding transistor T1 or T2 turns on and shorts the output terminal to the ground thus output of the NOR Gate gets LOW. Similar is the case when signal is applied at both terminals. This how the transistors and resistors can be used to implement the NOR Gate functionality.

NOR gates are available in the IC packages. As mentioned earlier that TTL (Transistor-Transistor Logic) and CMOS (Complementary Metal Oxide Semiconductor) technologies are used to design NOR gate. One of the most popular IC for NOR Gate is 4001 which is a QUAD two inputs NOR Gate IC which means that this IC contains four independent two input NOR Gates. The pinout and connection diagram of the 4001 IC is shown below:

I hope this article will be helpful for. In the next article I will come up with other important topics. Till then stay connected, keep reading and enjoy learning.

The post Introduction to NOR Gate appeared first on projectiot123 Technology Information Website worldwide.

]]>The post Introduction to NAND Gate appeared first on projectiot123 Technology Information Website worldwide.

]]>- AND Gate.
- OR Gate.
- NOT Gate.

AND Gate implements the Boolean AND function, OR gate implements the Boolean OR function and likewise NOT Gate (also called Inverter) implements the Boolean NOT function. The Boolean expressions of each basic gate along with their schematics symbol are shown in the following figure.

The input and output variables of the Boolean function can assume any one of two possible values called ‘0’ or ‘1’. In terms of positive logic ‘0’ is considered to be low and ‘1’ is considered to be HIGH, whereas in terms of the negative logic ‘0’ is considered to be HIGH and ‘1’ is considered to be LOW. Any Boolean expression can be implemented using these three basic logic Gates.

These basic digital logic gates that is AND, OR and NOT gates can be combined together in particular topologies to realize other important gates. The most common examples are NAND and NOR Gate. NAND Gate is formed by the combination of AND and NOT Gate in series that is by connecting the output of the AND at the input of the NOT Gate similarly NOR Gate is formed by the combination of OR and NOT Gate. Other important Gates formed by the combination of basic logic gates are XOR (Exclusive OR) and XNOR (Exclusive NOR) Gates. Here the discussion is oriented to the NAND Gate only.

As pointed out in previous paragraph that NAND Gate is the combination of AND and NOT Gate with input of NOT Gate connected at the output of the AND Gate. Thus corresponding to each combination of the inputs NAND Gate will have an output that is the complement of the output of the AND Gate. The schematic symbol along with the basic circuit of the NAND Gate is as shown in the following image:

As shown in the image above NAND Gate process the inputs A and B in such a way that first AND Gate manipulates the input variables A and B to generate A.B and then NOT gate acts on A.B to generate complement of the A.B. The Bubble symbol at the AND gate represents the negation of the output of the AND Gate.

The relation between the state of the output variable and that of the input variables is represented in the form of the table. This table is called the Truth Table. The Truth Table of the NAND Gate along with its schematics symbol is shown below:

The output of the NAND Gate is LOW if and only if both of its inputs are HIGH otherwise its output is HIGH, note that the output of the NAND Gate is exact complement of the AND Gate in which output will be HIGH if only if inputs are HIGH otherwise the output is LOW for all other combinations of the input variables.

NAND Gate has a very useful property which makes it unique and important among all other Gates. The Boolean expression of any complexity can be implemented using NAND Gate only that NAND Gate alone can be employed to realize all possible Boolean expressions without the need of any other Gate. This property of NAND Gate is called Functional Completeness, due to this property the entire microprocessor can be designed using NAND Gate only! NAND Gate shares this property with NOR Gate and both of the Gates are called Universal Gates.

Now let us understand the circuit that implements the NAND Gate. NAND Gate can be implemented in a variety of ways depending upon the electronic components used to design the circuit. For example diodes, transistors, resistors and combination of these components can implement the NAND Gate. The most popular techniques for designing the NAND gates are TTL (Transistor-Transistor Logic) and CMOS (Complementary Metal Oxide Semiconductor Transistor) logics. An example of the basic circuit implementing the NAND Gate functionality is shown in the figure below:

The inputs A and B of the NAND Gate are connected at the base of the transistors T1 and T2 respectively and the output is taken from the collector. The transistor here acts as the switch so when the signal is applied at the base of the transistor the transistor starts conducting and shorts the output to the ground similarly when no voltage is applied at the input the output is connected to the Vcc as shown. When signal is applied at input A only the transistor T1 turns ON and transistor T2 remains off thus the output terminal is connected to the Vcc and output of the NAND Gate is HIGH, similar is the case when signal is applied at input B only. When no signal is applied at either A and B the output terminal is still connected to the Vcc and output remains HIGH. But when signal is applied at both inputs A and B both transistors T1 and T2 turns on and shorts the output terminal to ground thus output will get LOW this is how the circuit implements the NAND Gate functionality.

NAND gates are available in the IC packages. As mentioned earlier that TTL (Transistor-Transistor Logic) and CMOS (Complementary Metal Oxide Semiconductor) technologies are used to design NAND gate. One of the most popular IC for NAND Gate is 4011 which is a QUAD two inputs NAND Gate IC which means that this IC contains four independent two input NAND Gates. The pinout and connection diagram of the 7404 IC is shown below:

I hope this article will be helpful for. In the next article I will other important topics. Till then stay connected, keep reading and enjoy learning.

The post Introduction to NAND Gate appeared first on projectiot123 Technology Information Website worldwide.

]]>The post Introduction to OR Gate appeared first on projectiot123 Technology Information Website worldwide.

]]>Digital logic gates are the building blocks of the digital circuit. Each basic logic gate implements a unique Boolean function and a complex Boolean expression is implemented using the network of basic gates. Three basic logic gates are:

- AND Gate.
- OR Gate.
- NOR Gate.

OR Gate implements the OR Boolean function and similarly AND and NOR Gates implements the OR and NOR functions respectively. Here the discussion will be oriented around the OR Gate only.

OR Gate is one of the basic logic gates that implement the logical OR operation. The Boolean expression that represents the logical conjunction and thus represents the functionality of the OR Gate is as shown below:

As shown OR Gate function is represented by the plus sign. OR Gate operates on minimum two inputs and depending upon the state of each input it delivers the output which is governed by the Boolean OR function. In Boolean algebra each variable can have one of the two values that is ‘0’ or ‘1’. Thus in the Boolean expression of the OR Gate the inputs A and B can assume either ‘0’ or ‘1’ and C which is the output of the OR function of input A and input B also assumes either ‘0’ or ‘1’.

The relation between the state of the output and that of the inputs is represented in the form of the table. This table is called the Truth Table. The Truth Table of the OR Gate along with its schematics symbol is shown below:

In order for the output to be HIGH one of the inputs A or B should be HIGH, the output is also HIGH when both A and B are HIGH otherwise the output would be LOW as represented by the truth table. In terms of Positive Logic ‘1’ is considered to be ‘HIGH’ and ‘0’ is considered as ‘LOW’ and in terms of Negative Logic ‘1’ is considered as ‘LOW’ and ‘0’ is considered to be ‘HIGH’.

Now let us understand the circuit that implements the OR Gate. OR Gate can be implemented in a variety of ways depending upon the electronic components used to design the circuit. For example diodes, transistors, resistors and combination of these components can implement the OR Gate. The most popular techniques for designing the OR gates are TTL (Transistor-Transistor Logic) and CMOS (Complementary Metal Oxide Semiconductor Transistor) logics. An example of the circuit implementing the OR Gate is shown in the figure below:

The inputs of the OR Gate are connected to base of the transistors and the output is connected to the emitter. As shown in the figure when either of the inputs A and B is HIGH the output is also HIGH or if one of the inputs is HIGH the output is HIGH as well. Here transistor acts as the switch when both or one of the transistors are on the voltage will appear at the emitter. It is important to note here that 5V represents the logic HIGH and 0 V represents the logic LOW.

OR gates are available in the IC packages. One of the most popular IC for OR Gate is 4071 which is a Quad-two input OR Gate IC which means that this IC contains 4 independent two input OR Gates. The pinout and connection diagram of the 4071 IC is shown below:

That is all for now I hope this article would be helpful for you in the next article I will come up with NOT gate. Stay connected, keep reading and enjoy learning.

The post Introduction to OR Gate appeared first on projectiot123 Technology Information Website worldwide.

]]>